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ORS 800 MHz: Rapid.Space Designs a Scalable NTN Development Platform

Rapid.Space designs a scalable NTN radio platform targeting 800 MHz aggregate bandwidth using Amarisoft, NXP LA1224 and DMA.
  • Last Update:2026-09-14
  • Version:001
  • Language:en

Rapid.Space has completed the initial system architecture of a wideband Non-Terrestrial Network (NTN) development platform derived from the PCIe Direct Memory Access (DMA) design already used in Open Radio Station (ORS). The first implementation phase targets a 400 MHz-class 1T1R radio path, while the scale-out architecture targets up to 800 MHz of aggregate bandwidth across multiple radio paths.

The Rapid.Space NTN SDK is designed as an integrated development platform for NTN UEs and NTN gNodeBs that can support Connected Collaborative Computing (3C) networks. It combines the Amarisoft software stack, an NXP LA1224-based wideband radio platform, simultaneous bidirectional IQ transport for TDD/FDD configurations, observable control interfaces, and a path from PCIe DMA to Radio over RDMA.

The goal is to provide a flexible architecture that can be used first for satellite and NTN prototyping, and later adapted into a cost-optimised product for volume manufacturing.

Key Benefits

  • ORS-derived DMA architecture
  • Amarisoft software stack
  • NTN UE simulator
  • NTN gNodeB simulator
  • 400 MHz-class target per radio path
  • Up to 800 MHz aggregate bandwidth via multiple radio paths
  • 1T1R SISO baseline
  • PCIe DMA data path
  • Planned Radio over RDMA data path
  • Simultaneous TX and RX IQ streaming for FDD configurations
  • Frequency-selectable RF front-end options
  • Observable control and monitoring interfaces
  • Overrun, underrun and health counters
  • Custom design and prototyping services
  • Cost optimisation and mass-production support

From the Existing ORS Architecture to Wideband NTN

Existing Rapid.Space ORS already uses DMA over PCIe to transfer IQ samples efficiently between the host computer and the radio hardware. This architecture is cost-efficient, well suited to all-in-one systems and avoids unnecessary CPU copies in the radio data path.

The wideband NTN architecture applies the same principle to a new class of radio platform. Amarisoft runs the complete NTN UE or NTN gNodeB software stack, including the PHY, on a Linux host. The radio platform is responsible for:

  • ADC and DAC conversion with a stable sampling clock;
  • high-speed IQ streaming over a DMA-capable interface;
  • low-rate radio configuration and monitoring;
  • connection to a project-specific RF front-end.

At this stage, the radio is not evaluated as a complete modem or base station. It is evaluated as a wideband SDR-like device that provides reliable IQ samples to and from the Amarisoft process.

The architecture does not require a vendor PHY, MAC, scheduler, LDPC implementation, FECU acceleration or VSPA3 acceleration inside the radio platform. These functions remain on the Amarisoft host. This separation simplifies the first integration phase and preserves flexibility for future compute platforms.

Cost-Efficient Architecture

Rapid.Space NTN SDK is based on the same NXP architecture family already used for 5G radio, fixed wireless access and NTN applications. The reference architecture consists of two functional assemblies:

  1. A Linux compute and SDR assembly running the Amarisoft software stack and connected to the NXP LA1224 radio device.
  2. A project-specific RF assembly providing filtering, amplification, frequency conversion, clocking and monitoring for the selected operating band.

The initial reference host is based on the NXP LX2160A CPU and runs a standard Linux operating system with SlapOS for automated deployment and operation. The software-defined radio is based on NXP LA1224 and converts digital IQ samples to and from analogue IQ signals.

For the first SDR and test phase, the LA1224 is used primarily as a wideband data-conversion and IQ-transport platform. Its integrated PHY accelerators are not required. This provides greater software flexibility and allows the same radio architecture to work with different host processors.

The host can later be replaced or complemented by a more powerful processor from AMD, Intel, NXP, SpacemiT or another supplier. Keeping the software processing on the host and defining a stable IQ interface reduces dependency on a single compute architecture.

At production volumes above 10,000 units, Rapid.Space will evaluate a more integrated implementation targeting a digital-radio subsystem cost below EUR 500. This target depends on the final component selection, integrated bill of materials and manufacturing assumptions; the project-specific RF front-end, host compute and commercial software licences are evaluated separately.

Wideband IQ Interface

The wideband IQ interface connects the Linux computer running the Amarisoft software stack to the NXP LA1224-based software-defined radio. It has two roles: data plane and control plane.

The data plane provides continuous simultaneous streaming of complex IQ samples in both directions, without CPU copies where the selected hardware and driver architecture allow it. The control plane provides low-rate configuration and monitoring, including frequency and gain settings, stream start and stop, clock status, temperature and health reporting.

To achieve sustained operation without silent data loss, overrun and underrun counters are part of the interface definition. These counters make the data path observable and allow long-duration tests to distinguish radio problems from host, driver or transport problems.

The architecture uses two complementary transport approaches:

  • PCIe DMA is the baseline for initial integration and all-in-one systems. It offers the shortest path between the host and LA1224 and reuses the DMA principles already used in ORS.
  • Radio over RDMA, using RoCEv2, is the scale-out direction. It separates the computer running Amarisoft from the radio gateway and allows host performance and radio hardware to evolve independently.

Rapid.Space previously demonstrated IQ transport over standard Ethernet using a software implementation of Radio over RDMA. The new NTN architecture extends this work toward substantially higher aggregate bandwidth and hardware-assisted data paths. The earlier demonstration is described in Rapid.Space demonstrates 6G Ethernet fronthaul interface powered by mature RDMA standard.

PCIe First, Radio over RDMA Next

Amarisoft Host (NXP LX2160A) <--> PCIe DMA <--> LA1224 <--> Project-specific RF front-end

The first implementation phase uses a direct PCIe DMA connection. This is the most direct way to bring up the LA1224, validate its control interface and measure sustained simultaneous TX and RX IQ streaming.

The long-term architecture separates compute and radio:

High-performance Amarisoft host  <--> RoCEv2 <--> LX2160A radio gateway <--> PCIe DMA <--> LA1224 <--> Project-specific RF front-end

In this configuration, Amarisoft runs on a high-performance standard host. The LX2160A acts as an RDMA endpoint and as a transport gateway between the RoCEv2 link and the LA1224 PCIe DMA interface.

This design introduces additional work in buffer management, timing, flow control and monitoring, but it also removes the LX2160A CPU performance ceiling from the Amarisoft processing path. It provides a practical evolution from an all-in-one development platform to a distributed radio architecture.

The implementation will validate each transport domain separately before validating the complete path. End-to-end operation will be measured through sustained throughput, latency, overrun and underrun counters, and long-run stability rather than theoretical interface speed alone.

Scaling from 400 MHz to 800 MHz Bandwidth

The first target is a 1T1R SISO radio path with up to 400 MHz-class instantaneous bandwidth. This establishes the baseline for ADC/DAC operation, DMA streaming, clock stability, control and monitoring.

The scale-out architecture combines multiple wideband radio paths to reach up to 800 MHz bandwidth per carrier. The exact usable radio bandwidth depends on the selected sampling profile, IQ sample format, transport capacity, RF front-end and Amarisoft configuration.

The current work is an architecture and design milestone. Hardware integration and sustained-performance validation form the next phase.

Frequency-Selectable RF Architecture

The digital radio platform is designed to be independent of a single operating band. Its final frequency range is determined by the external RF front-end selected for each project.

Depending on the application, the RF assembly can provide:

  • upconversion and downconversion;
  • PA and LNA stages;
  • filtering and shielding;
  • independent TX and RX paths for FDD operation;
  • separate TX and RX antennas or a duplexer;
  • clocking, PLL lock indication and basic health monitoring.

This separation allows the same compute, software and IQ-transport architecture to be reused for Ku-band, Ka-band, FR2 or other custom frequency ranges after the corresponding RF front-end has been designed and validated.

Amarisoft NTN UE and gNodeB Software

The platform is designed to run both the Amarisoft NTN UE software stack and the Amarisoft NTN gNodeB software stack.

In UE mode, Amarisoft runs the complete NTN UE stack, including the PHY, timing, Doppler and delay handling. It generates TX IQ samples and consumes RX IQ samples.

In gNodeB mode, the same radio architecture can be used as a wideband RF and IQ platform for the Amarisoft gNodeB stack. This makes it possible to use a common hardware architecture for NTN UE testing, NTN gNodeB testing and controlled end-to-end laboratory configurations.

The software role and radio role remain deliberately separated. Amarisoft implements the cellular and NTN processing, while the radio platform implements conversion, transport, clocking, RF control and monitoring.

Use Cases

Rapid.Space NTN SDK is intended for:

  • satellite communication tests;
  • satellite and NTN prototyping;
  • NTN UE software tests;
  • NTN UE prototype development;
  • NTN gNodeB software tests;
  • NTN gNodeB prototype development;
  • FR2 and custom-band prototyping;
  • wideband IQ streaming research;
  • parallel radio-channel experiments;
  • evaluation of future cost-efficient NTN terminal architectures.

Custom Design Services

Rapid.Space provides custom design services to turn the NTN SDK architecture into a project-specific prototype or production design.

For example, Rapid.Space can integrate the NXP LA1224-based SDR and the required radio-control interfaces into a single board with PCIe connectivity. Rapid.Space can also port the NTN SDK to cost-efficient, high-performance commercial off-the-shelf compute platforms based on mini-ITX, pico-ITX or custom formats.

Custom design services include:

  • integration of the compute platform, radio platform and PCIe DMA streaming path;
  • implementation and validation of the control interface for frequency, gain, stream start and stop, and status reporting;
  • simultaneous TX and RX DMA streaming validation;
  • overrun and underrun counter implementation;
  • long-duration stability testing;
  • integration and bring-up of a project-specific RF front-end;
  • documentation and validation material required to reproduce tests and results;
  • bill-of-material optimisation and preparation for mass production.

Development Roadmap

The architecture phase defines a staged validation process:

  1. Bring up the LA1224 PCIe endpoint and control interface.
  2. Validate PCIe DMA streaming in each direction.
  3. Validate sustained simultaneous TX and RX IQ streaming with health counters.
  4. Integrate the Amarisoft NTN UE software stack.
  5. Validate the first 400 MHz-class radio path.
  6. Add a project-specific RF front-end and perform RF measurements.
  7. Implement the RoCEv2-to-PCIe radio gateway.
  8. Scale the platform toward 800 MHz of aggregate bandwidth across multiple radio paths.
  9. Integrate and optimise the design for production volumes above 10,000 units.

This staged approach converts an architecture into measurable engineering milestones. Each phase produces reusable software, interfaces, hardware integration knowledge and validation procedures for the next generation of Rapid.Space radio products.

Building on ORS

Rapid.Space has already used software-defined radio, standard Linux compute and DMA-based IQ transport to build compact 4G and 5G systems. ORS has progressed from narrow-band private-network systems to products supporting 100 MHz radio bandwidth.

The NTN SDK architecture extends the same design philosophy: keep the radio interface observable, keep the software portable and create a clear path from laboratory validation to an integrated, cost-efficient product.

By combining the Amarisoft software stack, NXP LA1224 wideband conversion, the PCIe DMA experience already used in ORS and a future Radio over RDMA transport, Rapid.Space is building the technical foundation for a new generation of wideband NTN development systems.